AI's insatiable demand for interconnect.
Every leap in AI compute multiplies the high-speed links inside the rack. That demand is creating one of the largest, fastest-growing opportunities in semiconductors — and a hard technical wall right where we operate.
AI-driven interconnect across the datacenter
Compounding with every accelerator generation
In-package, in-tray, and across the rack
Figures reflect widely reported industry estimates for AI datacenter interconnect.
A decade of bandwidth gains — each enabled by a critical innovation.
High-speed interconnect has roughly doubled per-lane bandwidth every generation. Each step demanded a breakthrough. The move beyond 200G is the next — and the hardest yet.
- 28G The industry moves from NRZ toward higher-order modulation. →
- 56G DSP-based transceivers bring stronger, more accurate equalization. →
- 112G DSP proves robust across demanding loss profiles. →
- 224G Loss and reach budgets tighten — the next step needs new thinking.
Why it is getting harder
Beyond 200G, the bandwidth and reach the datacenter needs collide with the physics of the channel and the power budget of the system. Pushing further with conventional approaches costs reach, energy, or both.
Why it matters more
At AI scale, interconnect is no longer a detail — it is sheer volume, and failure is costly. The networks being built now need links that are faster, reach further, and stay reliable in production.
How we are approaching it.
Our approach →